1. Field of Invention
The present invention relates generally to time-to-digital converter (TDC) based analog-to-digital converter (ADC) architectures and, more specifically to a TDC based ADC architecture.
2. Description of the Related Art
Advances in complimentary metal-oxide semi-conductor (CMOS) technologies have dramatically improved the performance of systems which generally require an analog-to-digital converter (ADC) for an interface. These advances eventually led to a corresponding increase in data-converter performance. In such systems, the importance of analog to digital conversion is becoming crucial as analog to digital conversion itself is starting to become the system bottleneck in performance as well as power consumption. In addition, there is the continuous trend toward integration which favors the digitalization of parts or even the complete signal processing as opposed to its analog counterpart, e.g., all-digital phase locked loops (PLLs). Moreover, some of the challenges in designing ADCs in such scaled CMOS technologies include, for example, higher resolution, wider bandwidth requirements to support higher sampling rates, reduced dynamic range and hence signal-to-noise ratio, smaller foot print, and stringent power dissipation specifications. Thus, new and more energy efficient circuit architectures meeting such challenges are essential as analog device characteristics are expected to steadily degrade in sub-micron/sub-1V CMOS technologies.